Version 1.4¶
New minor release, created on 24th April 2019. Milestone: Release 1.4
Tested mainly with Vivado 2017.4 and 2018.3. Contains Ethernet-based example designs for:
Enclustra AX3 module, using the RGMII PHY on the PM3 baseboard
Xilinx KC705 eval board
Xilinx KCU105 eval board
Xilinx ZCU102 eval board
PC053a
The main new feature in this release is a PCIe transport interface for the IPbus transactor; this allows users to send and receive lists of IPbus transactions to/from the transactor via a PCIe link. The repository includes PCIe-based example designs for:
HiTech Global K800
Xilinx VCU118 eval board
Core¶
The source code for the Ethernet-transactor interface has been moved out of components/ipbus_core
.
ipbus_ctrl.vhd
can now be found incomponents/ipbus_util/firmware/hdl/masters
The source code that implements the Ethernet-transactor interface has been moved to
components/ipbus_transport_udp/firmware/hdl
; the corresponding top-level ‘depfile’ iscomponents/ipbus_transport_udp/firmware/cfg/ipbus_transport_udp.dep
Boards, example designs and utilities¶
We have removed redundant board-specific simulation files and simplified the directory structure under boards
[issue #89] - specifically, the directory structure changed as follows:
boards/enclustra_ax3_pm3/base_fw
becomesboards/enclustra_ax3_pm3
boards/glib_v3/base_fw
becomesboards/glib_v3
boards/kc705/base_fw/kc705_basex
becomesboards/kc705/basex
boards/kc705/base_fw/common
becomesboards/kc705/common
boards/kc705/base_fw/kc705_gmii
becomesboards/kc705/gmii
boards/kcu105/base_fw/kcu105_basex
becomesboards/kcu105/basex
boards/pc053a/base_fw
becomesboards/pc053a
boards/zcu102/base_fw/zcu102_basex
becomesboards/zcu102/basex
Bugfixes
ZCU102: Added missing top-level SFP enable signal, and corrected comments for pin constraints [issue #103]