μHAL (v2.6.5)
Part of the IPbus software repository
test_docu_examples.cpp
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1 /*
2 ---------------------------------------------------------------------------
3 
4  This file is part of uHAL.
5 
6  uHAL is a hardware access library and programming framework
7  originally developed for upgrades of the Level-1 trigger of the CMS
8  experiment at CERN.
9 
10  uHAL is free software: you can redistribute it and/or modify
11  it under the terms of the GNU General Public License as published by
12  the Free Software Foundation, either version 3 of the License, or
13  (at your option) any later version.
14 
15  uHAL is distributed in the hope that it will be useful,
16  but WITHOUT ANY WARRANTY; without even the implied warranty of
17  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18  GNU General Public License for more details.
19 
20  You should have received a copy of the GNU General Public License
21  along with uHAL. If not, see <http://www.gnu.org/licenses/>.
22 
23  Marc Magrans de Abril, CERN
24  email: marc.magrans.de.abril <AT> cern.ch
25 
26  Andrew Rose, Imperial College, London
27  email: awr01 <AT> imperial.ac.uk
28 
29  Tom Williams, Rutherford Appleton Laboratory, Oxfordshire
30  email: tom.williams <AT> cern.ch
31 
32 ---------------------------------------------------------------------------
33 */
34 
35 #include "uhal/uhal.hpp"
37 #include "uhal/tests/fixtures.hpp"
38 #include "uhal/tests/tools.hpp"
39 
40 #include <boost/test/unit_test.hpp>
41 
42 #include <vector>
43 #include <iostream>
44 
45 
46 namespace uhal {
47 namespace tests {
48 
49 
50 UHAL_TESTS_DEFINE_CLIENT_TEST_CASES(AddrTableDocuExamplesTestSuite, test_docu_addr_table_examples, DummyHardwareFixture,
51 {
52  ConnectionManager manager ( connectionFileURI );
53  // This line is majority of the test (i.e. load the addr table without exception).
54  HwInterface hw=manager.getDevice ( "dummy.docu" + deviceId.substr(5) );
55  // ***** "Single Register Address Table" example *****
57  (
58  ValWord< uint32_t > reg = hw.getNode ( "A" ).read();
59  hw.dispatch();
60  );
61  // ***** "Single Register on a Hierarchical Address Table" *****
63  (
64  //This is equivalent to getNode("B.A")
65  ValWord< uint32_t > reg = hw.getNode ( "B" ).getNode ( "A" ).read();
66  hw.dispatch();
67  );
68  // ***** "Multiple Modules with Identical Structure" *****
70  (
71  ValWord< uint32_t > reg = hw.getNode ( "D1.A2" ).read();
72  hw.dispatch();
73  );
74  // ***** "Read and Write Blocks of Memory and FIFOs" *****
76  (
77  //read
78  ValVector< uint32_t > mem = hw.getNode ( "F.A3" ).readBlock ( 16 );
79  ValVector< uint32_t > fifo = hw.getNode ( "F.A6" ).readBlock ( 16 );
80  //write
81  std::vector<uint32_t> x;
82 
83  //fill x...
84  for ( unsigned int iFill = 0 ; iFill < 16 ; ++iFill )
85  x.push_back ( iFill );
86 
87  hw.getNode ( "F.A4" ).writeBlock ( x );
88  hw.getNode ( "F.A7" ).writeBlock ( x );
89  hw.dispatch();
90  );
91 }
92 )
93 
94 
95 } // end ns tests
96 } // end ns tests
97 
UHAL_TESTS_DEFINE_CLIENT_TEST_CASES(BlockReadWriteTestSuite, block_write_read, DummyHardwareFixture, { std::vector< size_t > lDepths=getBlockUnitTestDepths();for(size_t i=0;i< lDepths.size();i++) { const size_t N=lDepths.at(i);BOOST_TEST_MESSAGE(" N = "<< N);HwInterface hw=getHwInterface();std::vector< uint32_t > xx;xx.reserve(N);for(size_t i=0;i!=N;++i) { xx.push_back(static_cast< uint32_t >(rand()));} hw.getNode("LARGE_MEM").writeBlock(xx);ValVector< uint32_t > mem=hw.getNode("LARGE_MEM").readBlock(N);BOOST_CHECK(!mem.valid());BOOST_CHECK_EQUAL(mem.size(), N);if(N > 0) { BOOST_CHECK_THROW(mem.at(0), uhal::exception::NonValidatedMemory);} BOOST_CHECK_THROW(mem.value(), uhal::exception::NonValidatedMemory);BOOST_CHECK_NO_THROW(hw.dispatch());BOOST_CHECK(mem.valid());BOOST_CHECK_EQUAL(mem.size(), N);if(N< N_10MB) { bool correct_block_write_read=true;std::vector< uint32_t >::const_iterator j=xx.begin();for(ValVector< uint32_t >::const_iterator i(mem.begin());i!=mem.end();++i,++j) { correct_block_write_read=correct_block_write_read &&(*i== *j);} BOOST_CHECK(correct_block_write_read);} } }) UHAL_TESTS_DEFINE_CLIENT_TEST_CASES(BlockReadWriteTestSuite
ValWord< uint32_t > reg
HwInterface hw
BOOST_CHECK_NO_THROW(hw.getNode("REG").writeBlock(xx))
ValVector< uint32_t > mem